Wed 17 Jul 2019 13:50 - 14:10 at Track 1 - Types

Modern Systems-on-a-Chip (SoC) are constructed by composition of IP (Intellectual Property) cores. There are well described interaction protocols for communication between IP Cores. However, there is a disconnect between the machine readable specification of these protocols and the verification of their implementation in known hardware description languages. Although tools can be written to address such a separation of concerns, such tooling is often hand written and used to check hardware designs a posteriori. We have developed a dependent type-system and proof-of-concept modelling language to reason about the physical structure of hardware interfaces respective to user provided descriptions. Our type-system provides correct-by-construction guarantees that the interfaces on an IP Core will be well-typed if they adhere to a specified standard.

Wed 17 Jul

13:30 - 15:10: ECOOP Research Papers - Types at Track 1
ecoop-2019-papers13:30 - 13:50
Research paper
Richard RobertsVictoria University of Wellington, Stefan MarrUniversity of Kent, Michael HomerVictoria University of Wellington, James NobleVictoria University of Wellington
ecoop-2019-papers13:50 - 14:10
Research paper
Jan de Muijnck-HughesUniversity of Glasgow, Wim VanderbauwhedeUniversity of Glasgow
ecoop-2019-papers14:10 - 14:30
Research paper
Alen ArslanagićUniversity of Groningen, Jorge A. PérezUniversity of Groningen, The Netherlands, Erik VoogdUniversity of Groningen
ecoop-2019-papers14:30 - 14:50
Research paper
Benjamin ChungNortheastern University, Francesco Zappa NardelliInria, Jan VitekNortheastern University
ecoop-2019-papers14:50 - 15:10
Research paper
Aleksandr MisonizhnikSaint-Petersburg State University, Dmitry MordvinovSaint-Petersburg State University, JetBrains Research